PCEP Extension for Bounded Latency

Introduction describes the Path Computation Element Protocol (PCEP) which is used between a Path Computation Element (PCE) and a Path Computation Client (PCC) (or other PCE) to enable computation of Multi-protocol Label Switching (MPLS) for Traffic Engineering Label Switched Path (TE LSP). PCEP Extensions for the Stateful PCE Model describes a set of extensions to PCEP to enable active control of MPLS-TE and Generalized MPLS (GMPLS) tunnels. As depicted in , a PCE MUST be able to compute the path of a TE LSP by operating on the TED and considering bandwidth and other constraints applicable to the TE LSP service request. The constraint parameters are provided such as metric, bandwidth, delay, affinity, etc. However these parameters can't meet the DetNet requirements. According to , Deterministic Networking (DetNet) operates at the IP layer and delivers service which provides extremely low data loss rates and bounded latency within a network domain. The bounded latency indicates the minimum and maximum end-to-end latency from source to destination and bounded jitter (packet delay variation). has described the enhanced requirements for DetNet enhanced data plane including the deterministic latency guarantees and information used by functions ensuring deterministic latency should be supported. A common data fields can be defined as per and a Deterministic Latency Action (DLA) option has been proposed to carry queuing-based metadata. The computing method of end-to-end delay bounds is defined in . It is the sum of the 6 delays in DetNet bounded latency model. And these delays should be measured and collected by IGP, but the related mechanisms are out of this document. The end-to-end delay bounds can also be computed as the sum of non queuing delay bound and queuing delay bound along the path. The upper bounds of non queuing delay are constant and depend on the specific network and the value of queuing delay bound depends on the queuing mechanisms deployed along the path. As per , explicit path should be calculated and established in control plane to guarantee the deterministic transmission. The corresponding IS-IS and OSPF extensions are specified in . When the PCE is deployed, the path computation should be applicable for deterministic networks. It is required that bounded latency including minimum and maximum end-to-end latency and bounded delay variation are considered during the deterministic path selection for PCE. The bounded latency constraints should be extended for PCEP. Moreover, the information along the deterministic path should be provided to the PCC after the path computation such as queuing parameters. This document describes the extensions for PCEP to carry deterministic latency constraints and distribute deterministic paths for end-to-end path computation in deterministic services.

Requirements Language The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT", "SHOULD", "SHOULD NOT", "RECOMMENDED", "MAY", and "OPTIONAL" in this document are to be interpreted as described in RFC 2119.

Terminology The terminology is defined as and .

PCEP Extensions

METRIC Object The METRIC object is defined in Section 7.8 of , comprising metric-value and metric-type (T field), and a flags field, comprising a number of bit flags (B bit and C bit). This document defines two types for the METRIC object.

End-to-End Bounded Delay Metric has proposed the Path Delay metric type of the METRIC object to represent the sum of the Link Delay metric of all links along a P2P path. This document proposes the End-to-End Bounded Delay metric in PCEP to represent the sum of Output delay, Link delay, Frame preemption delay, Processing delay, Regulation delay and Queuing delay as defined in along a deterministic path. Or the End-to-End Bounded Delay metric can be encoded as the sum of non queuing delay bound and queuing delay bound along the deterministic path. The extensions for End-to-End Bounded Delay Metric are as following shown:

T=TBD1: End-to-End Bounded Delay Metric.
The value of End-to-End Bounded Delay Metric is the encoding in units of microseconds with 32 bits.
The B bit MUST be set to suggest a maximum bound for the end-to-end delay of deterministic path. The end-to-end delay must be less than or equal to the value.

A PCC MAY use the End-to-End Bounded Latency metric in a Path Computation Request (PCReq) message to request a deterministic path meeting the end-to-end latency requirement. A PCE MAY use the End-to-End Bounded Latency metric in a Path Computation Reply (PCRep) message along with a NO-PATH object in the case where the PCE cannot compute a path meeting this constraint. A PCE can also use this metric to send the computed end-to-end bounded latency to the PCC.

End-to-End Bounded Jitter Metric has proposed the Path Delay Variation metric type of the METRIC object to represent the sum of the Link Delay Variation metric of all links along the path. This document proposes the End-to-End Bounded Jitter metric in PCEP to represent the difference between the end-to-end upper bounded latency and the end-to-end lower bounded latency along a deterministic path. The extensions for End-to-End Bounded Jitter Metric are as following shown:

T=TBD2: End-to-End Bounded Jitter Metric.
The value of End-to-End Bounded Jitter Metric is the encoding in units of microseconds with 32 bits.
The B bit MUST be set to suggest a maximum bound for the end-to-end jitter of deterministic path. The end-to-end jitter must be less than or equal to the value.

A PCC MAY use the End-to-End Bounded Jitter metric in a PCReq message to request a deterministic path meeting the end-to-end delay variation requirement. A PCE MAY use the End-to-End Bounded Jitter metric in a PCRep message along with a NO-PATH object in the case where the PCE cannot compute a path meeting this constraint. A PCE can also use this metric to send the computed end-to-end bounded Jitter to the PCC.

LSP Object The LSP Object is defined in Section 7.3 of . This document defines a new flag (D-flag) to present the deterministic path for the LSP-EXTENDED-FLAG TLV carried in LSP Object as defined in . D (Request for Deterministic Path) : If the bit is set to 1, it indicates that the PCC requests PCE to compute the deterministic path. A PCE would also set this bit to 1 to indicate that the deterministic path is included by PCE and encoded in the PCRep, PCUpd or PCInitiate message.

Deterministic Path ERO Subobject As defined in , the end-to-end delay bounds can be presented as the sum of non queuing delay bound and queuing delay bound along the path. The upper bounds of non queuing delay are constant and depend on the specific network, but the value of queuing delay bound depends on the queuing mechanisms deployed along the deterministic path. and a Deterministic Latency Action (DLA) option has been proposed to carry the queuing information. So to meet the requirements of the end-to-end delay, the PCE should select a path with a specific queuing mechanism and configure the related parameters to the PCC. And the PCC may insert the queuing-based information into the packet headers. The ERO specified in can be used to carry deterministic path information. In order to carry deterministic latency Action Information such as queuing information, this document defines a new ERO subobject referred to as the Deterministic Path ERO subobject (DP-ERO). An ERO carrying a deterministic path consists of one or more ERO subobjects, and it MUST carry DP-ERO subobjects. An DP-ERO subobject is formatted as shown in the following figure.

0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ |L| Type=TBD3 | Length | Class | DLA Type | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ // DLA Information(variable, optional) // +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ L (1bit): The L bit is an attribute of the subobject. The L bit is set if the subobject represents a loose hop in the explicit route. If the bit is not set, the subobject represents a strict hop in the explicit route. Type (8bits): Set to TBD3. Length (8bits): Contains the total length of the subobject in octets. The Length MUST be at least 8 and MUST be a multiple of 4. Class (8bits): indicates the deterministic forwarding class. DLA Type (8bits): indicates the type of DLA information. DLA Information (variable): indicates the corresponding Deterministic Latency Action parameters. The format depends on the value in the DLA type and the following sections shows the examples of the DLA information.

Deadline Information When the DLA Type is deadline-based queuing mechanisms, it should carry deadline information for the DP-ERO subobject. For example, the deadline-based queuing mechanism has been proposed in and . The deadlines parameters along the path should be computed at PCE and configured to the PCC, and then inserted into the packet headers. The format of the deadline information is shown as following figure.

0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Deadline | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ Deadline (32bits): indicates the deadline or budget delay for a node to forward a flow.

Cycle Information When the DLA Type is cyclic-based queuing mechanisms, it should carry Cycle information for the DP-ERO subobject. For example, the cyclic-based queuing mechanism has been proposed in [IEEE802.1Qch] and improved in . The cycle parameters along the path should be computed at PCE and configured to the PCC, and then inserted into the packet headers. The format of the cycle information is shown as following figure.

0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Cycle Profile ID | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Cycle ID | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ Cycle Profile ID (32bits): indicates the profile number which the cyclic queue applied at a node. Cycle ID (32bits): indicates the clycle number for a node to forward a flow.

Timeslot Information When the DLA Type is timeslot-based queuing mechanisms, it should carry timeslot information for the DP-ERO subobject. For example, the timeslot-based queuing mechanism has been proposed in . The timeslot parameters along the path should be computed at PCE and configured to the PCC, and then inserted into the packet headers. The format of the timeslot information is shown as following figure.

0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Timeslot ID | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ Timeslot ID (32bits): indicates the timeslot number for a node to forward a flow.

Security Considerations TBA

IANA Considerations

New Metric Types This document defines two new metric type for the PCEP. IANA is requested to allocate the following codepoint in the PCEP "METRIC Object T Field" registry:

New LSP-EXTENDED-FLAG Flag Registry defines the LSP-EXTENDED-FLAG TLV. IANA is requested to make allocations from the Flag field registry, as follows:

New ERO Subobject This document defines a new subobject type for the PCEP explicit route object (ERO). The code points for subobject types of these objects is maintained in the RSVP parameters registry, under the EXPLICIT_ROUTE objects. IANA is requested to confirm the following allocations in the RSVP Parameters registry for each of the new subobject types defined in this document.

Acknowledgements The authors would like to thank Dhruv Dhody, Andrew Stone, Lou Berger, Janos Farkas for their review, suggestions and comments to this document.